The present invention refers to a chip contacting method and to electronic circuits produced by such a method.
In the prior art, chip contacting methods are already known which, in comparison with conventional wire contacting methods, permit a substantial increase in the packaging and connection densities. Examples of such known methods are the TAB method (tape automated bonding=automatic film bonding) and the flip-chip contacting method.
According to these known methods, parasitic electric effects are substantially reduced through shorter signal propagation times with smaller signal losses.
The TAB method is an automatic, simultaneous contacting technique in the case of which the chip is connected via contact bumps to a conducting path structure on e.g. a polyimide film (tape). For fastening the chips provided with the contact bumps to the tape (this being also referred to as xe2x80x9cinner-lead bondingxe2x80x9d), the contact bumps and the conducting paths are interconnected by a thermode having a defined temperature-pressure-time profile (this being also referred to as thermocompression bonding xe2x80x9cTCxe2x80x9d).
According to the flip-chip contacting method, a chip, which comprises e.g. an integrated circuit, is fastened to the substrate with the active side thereof (referred to as xe2x80x9cface downxe2x80x9d). Also in this case, the electric connection is established by metallic contact bumps, which can be provided on the chip or, in some cases, also on the substrate.
The disadvantage of the processes which have been described hereinbefore and which use contact bumps (so-called xe2x80x9cbumping processesxe2x80x9d) is to be seen in the fact that these processes require an expensive equipment for the photolithography, the thin film metallization and the electroplating processes, an economic rise of this equipment being only guaranteed when adequately high numbers of pieces are produced.
A further known method is described in U.S. Pat. No. 4,842,662, where the problem arising in connection with the bumping processes is eliminated by a TAB method which does not make use of contact bumps (a xe2x80x9cbumplessxe2x80x9d TAB method). For this purpose, a conducting path structure is bonded e.g. directly onto an aluminum connection surface of a chip by so-called thermocompression. This method is disadvantageous insofar as thermocompression bonding entails high temperatures and high stresses, which are produced by the compressive force of approx. 50 N/mm2 applied during the bonding process. This causes stress on the underlying layer system, which may result in cracks and a failure of components.
JP 60-262 430 A refers to a method of producing a semiconductor element. As can be seen from FIG. 1, a chip is there connected to a carrier substrate. The carrier substrate comprises conducting paths with which the chip to be contacted is to be connected. For producing the connection, this publication teaches the use of a resin, which establishes a connection between the chip and the carrier substrate when the chip has been applied. Contact bumps are provided, which are arranged on the contact area of the chip. In other words, it is necessary to carry out the above-mentioned steps for forming the contact bumps and this results in the problems mentioned hereinbefore.
EP 03 89 040 A1 concerns a substrate with connection structures. According to FIG. 2, a substrate is fastened to a carrier body, the fastening being carried out by means of an adhesive. For establishing the electric connection, contact bumps are provided between the substrate and the carrier body.
It is the object of the present invention to provide a chip contacting method which permits contacting at low temperatures and under low pressure in a simple, fast and economy priced manner; additional method steps for producing contact bumps or an additional metallization layer on the chip are to be avoided by said method.
The present invention provides a chip contacting method for contacting a chip with a carrier substrate, the chip comprising a plurality of conductive areas and the carrier substrate comprising a plurality of conductive connecting sections, neither the conductive areas nor the conductive connecting sections being provided with an additional metallization layer. The method has the following steps: a) providing a carrier substrate, the first surface of the carrier substrate having arranged thereon a non-conductive adhesive layer; b) aligning the carrier substrate with a chip to be contacted in such a way that the plurality of conductive areas on the chip to be contacted is in alignment with the conductive connecting sections on the first surface of the carrier substrate; and c) connecting the carrier substrate and the chip to be contacted by means of adhesive layer in such a way that the connecting sections of the carrier substrate and the conductive areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.
It is a further object of the present invention to provide an electronic circuit in the case of which one chip or a plurality of chips with a plurality of conductive contact areas, which are not provided with an additional metallization layer, are contacted on a carrier substrate in a simple, fast and economy-priced manner.
The present invention provides an electronic circuit, comprising a chip with a plurality of conductive areas which are not provided with an additional metallization layer and a carrier substrate whose first surface, which faces said plurality of conductive areas of the chip, has arranged thereon a non-conductive adhesive layer and a plurality of conductive connecting sections, which are not provided with an additional metallization layer, said adhesive layer covering said plurality of conductive connecting sections at least partially, the conductive connecting sections of the carrier substrate and the conductive areas of the chip abutting on one another by means of pressure contact due to the adhesive force produced by the adhesive layer, without any intermetallic connection being established. The conductive areas are substantially planar with the chip.
One advantage of the method according to the present invention is to be seen in the fact that, due to the use of adhesive processes for the fastening of chips to the carrier substrate, fluxless chip contacting at low temperatures is made possible, said fluxless chip contacting being adapted to be used for flexible substrates with a low glass transition temperature.
A further advantage of the method according to the present invention is to be seen in the fact that the adhesive technology according to the present invention permits the use of a plurality of economy-priced materials, such as polyester, for the substrate.
In comparison with the flip-chip contacting method described hereinbefore, the method according to the present invention shows the further advantage that no contact bumps are required for contacting.
In comparison with the TAB contacting method described hereinbefore, the method according to the present invention offers the advantage that the temperatures and pressures required for carrying out the contacting are much lower.